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I2PC Seminar Series - Illusionist: Transforming Lightweight Cores into Aggressive Cores on Demand


Amin Ansari (University of Illinois)

Date Mar 28, 2013
Time 4:00 pm - 5:00 pm  

Central Time


Siebel Center 2405




Illinois-Intel Parallelism Center


Meg Osfar

Views 2286
Originating Calendar I2PC Events

Illinois-Intel Parallelism Center (I2PC) Distinguished Speaker Series

Thursday, March 28th, 4-5pm Central Time, Siebel Center 2405


 Transforming Lightweight Cores into Aggressive Cores on Demand

 Amin Ansari

 University of Illinois

ABSTRACT: Power dissipation limits combined with increased silicon integration

have led microprocessor vendors to design chip multiprocessors (CMPs)

with relatively simple (lightweight) cores. While these designs

provide high throughput, single-thread performance has stagnated or

even worsened. Asymmetric CMPs offer some relief by providing a small

number of high-performance (aggressive) cores that can accelerate

specific threads. However, threads are only accelerated when they can

be mapped to an aggressive core, which are restricted in number due to

power and thermal budgets of the chip. Rather than using the

aggressive cores to accelerate threads, this paper argues that the

aggressive cores can have a multiplicative impact on single-thread

performance by accelerating a large number of lightweight cores and

providing an illusion of a chip full of aggressive cores.

Specifically, we propose an adaptive asymmetric CMP, Illusionist, that

can dynamically boost the system throughput and get a higher

single-thread performance across the chip. To accelerate the

performance of many lightweight cores, those few aggressive cores run

all the threads that are running on the lightweight cores and generate

execution hints. These hints are then used to accelerate the execution

of the lightweight cores. However, the hardware resources of the

aggressive core are not large enough to allow the simultaneous

execution of a large number of threads. To overcome this hurdle,

Illusionist performs aggressive dynamic program distillation to

execute small, critical segments of each lightweight-core thread. A

combination of dynamic code removal and phase-based pruning distill

programs to a tiny fraction of their original contents. Experiments

demonstrate that Illusionist achieves 35% higher single thread

performance for all the threads running on the system, compared to a

CMP with all lightweight cores, while achieving almost 2X higher

system throughput compared to a CMP with all aggressive cores.

BIO: Amin Ansari is currently a National Science Foundation Computing

Innovation Fellow and Postdoctoral Research Associate in the Computer

Science Department of the University of Illinois at Urbana-Champaign,

working with Prof. Josep Torrellas. His research interests lie in the

area of computer architecture with more focus on reliability and

low-power design. He is working on microarchitectural solutions for

on-chip caches, processor pipeline, and network-on-chip to tackle deep

sub-micron technology challenges such as power density, process

variation, manufacturing defects, and wearout. He received the Ph.D.

degree in Computer Science and Engineering from the University of

Michigan under Prof. Scott Mahlke in 2011. He received the B.S. degree

in computer engineering from Sharif University of Technology in 2007.

In addition, Amin has published more than 20 papers in top-tier

journals and international conferences such as IEEE Transactions on

Computers, ISCA, HPCA, MICRO, and DSN. His academic achievements were

recognized by 2010 College of Engineering Distinguished Achievement

Award during his graduate studies at the University of Michigan. He

received the best paper award at the 27th IEEE International

Conference on Computer Design in 2009.


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