Thursday, May 2nd, 3-4pm Central Time, Siebel Center 2405
Warehouse-scale Computing: Challenges and Opportunities
James Laudon Google
ABSTRACT: Warehouse-scale computers power the services offered by companies such
as Google, Facebook, Amazon, Yahoo, and Microsoft’s online services division. They differ significantly from traditional datacenters: they belong to a single organization, use a relatively homogeneous hardware and system software platform, and share a common systems management layer. Most importantly, WSCs run a smaller number of very large applications (or Internet services), and the common resource management infrastructure allows significant deployment flexibility. The requirements of homogeneity, single-organization control, reliability, and enhanced focus on cost-efficiency motivate designers to take new approaches in constructing and operating these systems. In this talk, I'll discuss some of the challenges with WSCs, such as maintaining high availability and low "tail" latency for all the services on which your computation depends. WSCs also bring many opportunities, and I'll outline some of those opportunities and discuss a couple of ongoing projects at Google Madison pursuing them.
BIO: James Laudon is the Site Director for the Madison Google office. His areas of expertise include multithreading, multiprocessors, system software, distributed computing, and performance modeling. He is currently focused on advanced hardware and system software development for Google’s datacenters. Prior to Google, James was a Distinguished Engineer with Sun Microsystems and led the architecture of several generations of the UltraSPARC Tx chip multiprocessor line. He joined Sun through their acquisition of Afara Websystems, where he managed the architecture and performance team. Prior to Afara, he worked at Broadcom on wired and wireless networking chips, at a superscalar DSP startup, and at Silicon Graphics, where he architected the SGI Origin 2000. James has a B.S. in Electrical Engineering from the University of Wisconsin – Madison and a M.S. and Ph.D. in Electrical Engineering from Stanford University. While at Stanford, James was co-architect of the Stanford DASH multiprocessor and in his Ph.D. dissertation he proposed interleaved multithreading, the multithreading technique employed by the original UltraSPARC T1 chip multiprocessor.