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Event Detail Information

Event Detail Information

I2PC Seminar Series - Loop-Based Alias Speculation Using Atomic Region Support

Speaker Wonsun Ahn (University of Illinois)
Date Jan 17, 2013
Time 4:00 pm - 5:00 pm   Central Time
Location Siebel Center 2405
Cost Free
Sponsor Illinois-Intel Parallelism Center
Contact Meg Osfar
E-Mail mosfar2@illinois.edu
Views 534

Illinois-Intel Parallelism Center (I2PC) Distinguished Speaker Series

                          http://i2pc.cs.illinois.edu/

 

Thursday, January 17th, 4-5pm CST, Siebel Center 2405

 

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      Loop-Based Alias Speculation Using Atomic Region Support

 

                                         Wonsun Ahn

                                     University of Illinois

 

 

ABSTRACT: Alias analysis is a critical component in many compiler optimiza- tions. A promising approach to reduce the complexity of alias anal- ysis is to use speculation. The approach consists of performing op- timizations assuming the alias relationships that are true most of the time, and repair the code when such relationships are found not to hold. This work proposes alias speculation that leverages hardware support for atomic regions, which is becoming increasingly popular today. The use of atomic regions eliminates the need for recovery code, which limits the scope and aggressiveness of past speculative alias schemes. In addition, it greatly decreases the amount of alias checks that have to be performed at runtime, which used to slow- down execution. The potential of the new alias speculation is tested with Loop Invariant Code Motion (LICM) and Global Value Num- bering (GVN) optimization passes.

This is work with Yuelu Duan and Josep Torrellas that will appear in ASPLOS 2013.

BIO: Wonsun Ahn is a postdoctoral research scientist at the Computer Science Department of the University of Illinois at Urbana-Champaign. He received his PhD degree from the same department at 2012 and his bachelor's degree from Seoul National University in Korea at 2004. His current research efforts are focused on making the hardware-software barrier more permeable by proposing hardware extensions to enable more compiler optimizations based on runtime information.

 

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The talk will be streamed live at this link:

* http://media.cs.illinois.edu/live/I2PClive.asx

 

Questions to the speaker for live response can be directed to our chat

moderator:

* http://i2pc.cs.illinois.edu/chat

 

A complete list of seminars (with archived copies of past talks) is

available here:

* http://i2pc.cs.illinois.edu/seminars.html