Event Detail Information
Event Detail Information
Illinois-Intel Parallelism Center (I2PC) Distinguished Speaker Series: Uzi Vishkin (University of Maryland)
Illinois-Intel Parallelism Center (I2PC) Distinguished Speaker Series
Thursday April 12th, 4pm CDT, Room SC3405
Time to Right the Transition to General-Purpose
University of Maryland
Abstract: The challenge of reinventing general-purpose computing for parallelism came into focus 2003, once processor clock frequencies generally stopped improving, is yet to be met. I will present evidence that, under some assumptions, the effective utilization of potential desktop computing speed in 2012 is around 1% of what desktop machines could have provided had they been built and programmed differently; one such assumption is that typical programmers’ background does not exceed a Bachelor degree in CS. During the last decade, high-performance general-purpose application innovations, excluding graphics, were minimal in comparison, for instance, to internet and mobile. Perhaps since programming many-cores effectively is too difficult and hence too costly, not enough applications have been developed. This led to a vicious cycle. Lacking applications, an insufficient business case for building the best possible many-core preempts both competition among vendors and a renewed programming model contract between vendors and application developers. The resulting threats to validity/robustness of system, programming and application research and education when only suboptimal hardware is used must also be better recognized.
I will claim that the explicit multi-threaded (XMT) on-chip platform, developed by my research team, can do better by order-of-magnitude over vendors’ many-cores on both ease-of-programming and speedups over best serial solutions and support both claims by experimental data. For ease-of-programming the data include more advanced parallel algorithms, comparable problems taught at earlier developmental stages (e.g., high-school vs. graduate school), a report by DoD employee of minimal effort for XMT programming beyond a serial version for several parallel graph algorithms, and a joint UIUC/UMD course in which no student was able to get speedups over serial on OpenMP running on commercial SMP hardware, while their speedups on XMT were in the range 7X to 25X. For speedups, stress tests of XMT relative to state-of-the-art CPUs and GPUs for irregular fine-grained problems show speedups of up to 43X; these results assume similar silicon area and power, but much simpler algorithms. To facilitate these advantages, XMT was set up as a clean-slate design supporting the foremost theory of parallel algorithms.
Bio: Uzi Vishkin has been Professor at the University of Maryland Institute for Advanced Computer Studies (UMIACS) since 1988. His prior affiliations included Technion, IBM T.J. Watson, NYU, and Tel Aviv University, where he was also CS Chair. Per his ACM Fellow citation, he “played a leading role in forming and shaping what thinking in parallel has come to mean in the fundamental theory of Computer Science”. The presentation framework in several parallel PRAM algorithms textbooks, which also include quite a few parallel algorithms he co-authored, is the 1982 Shiloach-Vishkin work-depth methodology. His research team’s recent work on his explicit multi-threaded (XMT) many-core ‘PRAM-On-Chip’ architecture refuted the common wisdom that PRAM algorithms are irrelevant for practice. He is an ISI-Thompson Highly Cited Researcher, was named a Maryland Innovator of the Year for his PRAM-On-Chip venture whose main patent was cited in quite a few patents of major vendors, and his proposal for Reinvention of Computing for Parallelism was ranked first among 49 proposals in a University System of Maryland competition for Maryland Research Centers of Excellence.
I2PC seminars are held on Thursdays at 4pm Central Time in Room 3405 of the Siebel Center.
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